1 of 6 090503 features converts cmos rams into nonvolatile memories unconditionally write protects when v cc is out-of-tolerance automatically switches to battery when power-fail occurs space-saving 8-pin dip consumes <100na of battery current tests battery condition on power up provides for redundant batteries optional 5% or 10% power-fail detection low forward voltage drop on the v cc switch optional 16-pin soic surface mount package optional industrial (n) temperature range of -40c to +85c pin assignment pin description v cco - ram supply v bat1 - + battery 1 tol - power supply tolerance gnd - ground ce - chip enable input ceo - chip enable output v bat2 - + battery 2 v cci - + supply nc - no connect description the ds1210 nonvolatile controller chip is a cmos ci rcuit which solves the application problem of converting cmos ram into nonvolatile memory. incoming power is monitored for an out-of-tolerance condition. when such a condition is detected, chip en able is inhibited to accomplish write protection and the battery is switched on to suppl y the ram with uninterrupted power . special circuitry uses a low- leakage cmos process which affords precise voltage detection at extremely low battery consumption. the 8-pin dip package keeps pc board real estate requirements to a minimum. by combining the ds1210 nonvolatile controller chip with a cmos memory and batteries, nonvolatile ram operation can be achieved. ds1210 nonvolatile controller chip www.maxim-ic.com vcco vbat1 tol gnd 1 2 3 4 vcci vbat2 ceo ce 8 7 6 5 ds1210 8-pin dip (300-mil) see mech. drawin g s section nc vcco nc vbat1 nc tol nc gnd nc vcci nc vbat2 nc ceo nc ce 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ds1210s 16-pin soic (300-mil) see mech. drawings section
ds1210 2 of 6 operation the ds1210 nonvolatile controller perform s five circuit functions required to battery back up a ram. first, a switch is provided to direct power from the battery or the incoming supply (v cci ) depending on which is greater. this switch has a voltage drop of less than 0.3v. the second function which the nonvolatile controller provide s is power-fail detection. the ds1210 constantly monitors the incoming supply. when the supply goes out of tolerance a prec ision comparator detects power-fail and inhibits chip enable ( ceo ). the third function of write protection is accomplished by holding the ceo output signal to within 0.2 volts of the v cci or battery supply. if ce input is low at the time power-fail detection occurs, the ceo output is kept in its present state until ce is returned high. the de lay of write protection until the current memory cycle is completed prevents the corruption of data. power-fail detection occurs in the range of 4.75 volts to 4.5 volts with the toleranc e pin 3 grounded. if pin 3 in connected to v cco , then power-fail detection occurs in the range of 4.5 vo lts to 4.25 volts. during nominal supply conditions ceo will follow ce with a maximum propagation delay of 20ns. the fourth function the ds1210 performs is a battery status warning so that potential data loss is avoided. each time that the circuit is powered up the battery voltage is checked with a precision comparator. if the battery voltage is less than 2.0 volts, the second memory cycle is inhibited. ba ttery status can, therefore, be determined by performing a read cycle after power-up to any location in memory, verifying that memory location content. a subsequent write cycle can then be executed to the same memory location altering the data. if the next read cycle fails to verify the written data, then the batteries are less than 2.0v and data is in danger of being corrupted. the fifth function of the nonvolatile contro ller provides for battery redundancy. in many applica tions, data integrity is paramount. in th ese applications it is often desirable to use two batteries to ensure reliability. the ds1210 c ontroller provides an intern al isolation switch which allows the connection of two batteries. during ba ttery backup operation the battery with the highest voltage is selected for use. if one battery should fa il, the other will take over the load. the switch to a redundant battery is transparent to circuit operation and to the user. a battery status warning will occur when the battery in use falls below 2.0 volts. a grounded v bat2 pin will not activate a battery-fail warning. in applications where ba ttery redundancy is not required, a sing le battery should be connected to the bat1 pin. the bat2 battery pin must be ground ed. the nonvolatile controlle r contains circuitry to turn off the battery backup. this is to maintain the battery(s) at its highest capacity until the equipment is powered up and valid data is written to the sram. while in the freshness seal mode the ceo and v cco will be forced to v ol . when the batteries are first attached to one or both of the v bat pins, v cco will not provide battery back-up until v cci exceeds v cctp , as set by the t ol pin, and then falls below v bat . figure 1 shows a typical application incorporating the ds1210 in a microprocessor-based system. section a shows the connections necessary to write protect the ram when v cc is less than 4.75 volts and to back up the supply with batteries. section b shows the use of the ds1210 to halt the processor when v cc is less than 4.75 volts and to delay its restar t on power-up to prevent spurious writes.
ds1210 3 of 6 section a - battery backup figure 1 battery backup current drain example consumption ds1210 i bat 100 na ram i cc02 10 a total drain 10.1 a section b - processor reset
ds1210 4 of 6 absolute maximum ratings* voltage on any pin relativ e to ground -0.3v to +7.0v operating temperature 0 c to +70 c, -40 c to +85 c for n parts storage temperature -55 c to +125 c soldering temperature see ipc/jedec j-std-020a * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions (see note 9) parameter symbol min typ max units notes pin 3 = gnd supply voltage v cci 4.75 5.0 5.5 v 1 pin 3 = v cco supply voltage v cci 4.5 5.0 5.5 v 1 logic 1 input v ih 2.2 v cc +0.3 v 1 logic 0 input v il -0.3 +0.8 v 1 battery input v bat1 , v bat2 2.0 4.0 v 1, 2 dc electrical characteristics (see note 9; v cci = 4.75 to 5.5v pin 3 = gnd) (v cci = 4.5 to 5.5v, pin 3 = v cco ) parameter symbol min typ max units notes supply current i cci 5ma3 supply voltage v cco v cc -0.2 v 1 supply current i cco1 80 ma 4 input leakage i il -1.0 +1.0 a output leakage i lo -1.0 +1.0 a ceo output @ 2.4v i oh -1.0 ma 5 ceo output @ 0.4v i ol 4.0 ma 5 v cc trip point (tol=gnd) v cctp 4.50 4.62 4.74 v 1 v cc trip point (tol=v cco )v cctp 4.25 4.37 4.49 v 1 (see note 9; v cci = < v bat ) ceo output v ohl v bat -0.2 v 7 v bat1 or v bat2 battery current i bat 100 na 2, 3 battery backup current @ v cco = v bat ? 0.3v i cco2 50 a 6, 7
ds1210 5 of 6 capacitance (t a = 25c) parameter symbol min typ max units notes input capacitance c in 5pf output capacitance c out 7pf ac electrical characteristics (see note 9; v cci = 4.75v to 5.5v, pin 3 = gnd) (v cci = 4.75v to 5.5v, pin 3 = gnd) parameter symbol min typ max units notes ce propagation delay t pd 51020ns5 ce high to power-fail t pf 0ns (see note 9; v cci = 4.75v, pin 3 = gnd; v cci < 4.5, pin 3 = v cco ) recovery at power up t rec 2 80 125 ms v cc slew rate power-down t f 300 s v cc slew rate power-down t fb 10 s v cc slew rate power-down t r 0s ce pulse width t ce 1.5 s 8 notes: 1. all voltages are referenced to ground. 2. only one battery input is required. u nused battery inputs must be grounded. 3. measured with v cco and ceo open. 4. i cc01 is the maximum average load which the ds1210 can supply to the memories. 5. measured with a load as shown in figure 2. 6. i cc02 is the maximum average load current which the ds1210 can supply to the memories in the battery backup mode. 7. t ce max. must be met to ensure data integrity on power loss. 8. ceo can only sustain leakage current in the battery backup mode. 9. all ac and dc electrical characteristics are valid for the full temperature range. for commercial products, this range is 0 to +70 c. for industrial products (n), this range is -40 c to +85 c. 10. ds1210 is recognized by underwriters laboratory (u.l. ? ) under file e99151.
ds1210 6 of 6 timing diagram: power-up timing diagram: power-down output load figure 2
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